From: Mark Date: Tue, 30 May 2023 02:49:54 +0000 (-0600) Subject: read set_value args from temp regs of put_unsafe_value (#1812) X-Git-Tag: v0.9.2~128 X-Git-Url: https://git.sagredo.dev/?a=commitdiff_plain;h=6093c2858dfe313cdebe5941baf843006edaf958;p=scryer-prolog.git read set_value args from temp regs of put_unsafe_value (#1812) --- diff --git a/src/fixtures.rs b/src/fixtures.rs index 65340da0..01a5e385 100644 --- a/src/fixtures.rs +++ b/src/fixtures.rs @@ -258,6 +258,7 @@ pub(crate) struct UnsafeVarMarker { pub(crate) safe_perm_vars: IndexSet, pub(crate) safe_temp_vars: IndexSet, pub(crate) temp_vars_to_perm_vars: IndexMap, + pub(crate) perm_vars_to_temp_vars: IndexMap, } impl UnsafeVarMarker { @@ -268,6 +269,7 @@ impl UnsafeVarMarker { safe_perm_vars: IndexSet::new(), safe_temp_vars: IndexSet::new(), temp_vars_to_perm_vars: IndexMap::new(), + perm_vars_to_temp_vars: IndexMap::new(), } } @@ -344,14 +346,16 @@ impl UnsafeVarMarker { if let Some(ph) = self.unsafe_perm_vars.swap_remove(&p) { if ph == phase { *query_instr = Instruction::PutUnsafeValue(p, arg); - self.safe_perm_vars.insert(p); + self.perm_vars_to_temp_vars.insert(p, arg); } else { self.unsafe_perm_vars.insert(p, ph); } } } - &mut Instruction::SetValue(r @ RegType::Perm(p)) - if !self.safe_perm_vars.contains(&p) => { + &mut Instruction::SetValue(r @ RegType::Perm(p)) => + if let Some(t) = self.perm_vars_to_temp_vars.get(&p) { + *query_instr = Instruction::SetValue(RegType::Temp(*t)); + } else { *query_instr = Instruction::SetLocalValue(r); self.safe_perm_vars.insert(p); diff --git a/src/heap_print.rs b/src/heap_print.rs index 910600ab..7eba8aca 100644 --- a/src/heap_print.rs +++ b/src/heap_print.rs @@ -841,19 +841,19 @@ impl<'a, Outputter: HCValueOutputter> HCPrinter<'a, Outputter> { } fn check_for_seen(&mut self) -> Option { - if let Some(addr) = self.iter.next() { - let is_cyclic = addr.get_forwarding_bit(); + if let Some(cell) = self.iter.next() { + let is_cyclic = cell.get_forwarding_bit(); - let addr = heap_bound_store( + let cell = heap_bound_store( self.iter.heap, - heap_bound_deref(self.iter.heap, addr), + heap_bound_deref(self.iter.heap, cell), ); - let addr = unmark_cell_bits!(addr); + let cell = unmark_cell_bits!(cell); - match self.var_names.get(&addr).cloned() { - Some(var) if addr.is_var() => { - // If addr is an unbound variable and maps to + match self.var_names.get(&cell).cloned() { + Some(var) if cell.is_var() => { + // If cell is an unbound variable and maps to // a name via heap_locs, append the name to // the current output, and return None. None // short-circuits handle_heap_term. @@ -868,7 +868,7 @@ impl<'a, Outputter: HCValueOutputter> HCPrinter<'a, Outputter> { None } var_opt => { - if is_cyclic && addr.is_compound(self.iter.heap) { + if is_cyclic && cell.is_compound(self.iter.heap) { // self-referential variables are marked "cyclic". match var_opt { Some(var) => { @@ -889,7 +889,7 @@ impl<'a, Outputter: HCValueOutputter> HCPrinter<'a, Outputter> { return None; } - Some(addr) + Some(cell) } } } else {